Exploração de computação aproximada no projeto de hardware dedicado de baixo consumo para a codificação de vídeo em dispositivos móveis

Abstract

Energy efficiency has become a primary concern in the design of digital systems for multimedia, especially for mobile devices. At the same time, it is a big challenge to develop energy-aware algorithms and low-power hardware architectures while keeping the trade-off with coding efficiency. In this way, a promising approach for the design of energy-efficient digital systems is a paradigm called approximate computing. This approach explores the error-resiliency or error tolerance of some applications. The error tolerance combined with the limitations of the human vision system improves the efficiency of approximate computing in video coding applications. Video coding is an example of application that can be improved in energy efficiency by inserting approximate computing techniques. The introduction of a limited amount of approximate computing in the prediction steps algorithms often results in acceptable quality loss. With this in mind, several hardware solutions with low power dissipation were developed and presented in this Doctoral Thesis: one architecture aiming intraframe prediction, two architectures aiming interframe prediction and a power-precision scalable adder. The solution for intraframe prediction is an energy-quality scalable SAD unit. This architecture is able to process UHD 8K videos at 60 frames per second with power savings of 27% and a slight coding efficiency loss from 0.28% to 1.72%. The first approximate solution for interframe prediction is an architecture for motion estimation with low power dissipation. This architecture reached power savings from 7% to 11.5%. The impacts on the coding efficiency are negligible: between 0.6% and 2.5%. The second architecture is a complete solution for motion estimation. This solution can process UHD 8K videos in real time at 120 frames per second and have the highest throughput and the best result in terms of energy efficiency among all related works. Finally, a power-precision scalable adder has been developed. This operator is a dynamically configurable imprecise adder, supporting a wide range of applications.