Heuristic-based Algorithms and Hardware Designs for Fast Intra-picture Prediction in AV1 Video Coding.

Abstract

Video coding for compression purposes is paramount for any application or service based on digital video. Without compression, modern digital content requires a prohibitively large amount of data. A video coding format defines the format for video content representation in a compressed form, to be used conveniently for storage or transmission. Video formats are, typically, standardized and have video encoders and decoders made for them, in both software and hardware. This thesis presents hardware-friendly algorithms capable of reducing the number of operations of the video encoder mode decision process in the intra-picture prediction module, one of its most time-consuming modules. Additionally, it also presents intra-picture prediction hardware designs, optimized for both low power and high energy efficiency, implementing the proposed algorithms. All software and hardware solutions described in this thesis target the AOMedia Video 1 (AV1) format, which is state-of-the-art in open-source and royalty-free video coding. All algorithms proposed were evaluated in the AV1 reference software using common test conditions, and all hardware designs were described in VHDL and synthesized to TSMC 40nm standard-cells technology. The encoding efficiency and encoding time results for the proposed algorithms, as well as the gate count and energy consumption results for the hardware designs, confirm that solutions developed during this Ph.D. project meet the requirements of current video technology, such as coding of Ultra-High Definition (UHD) resolutions at high speeds and high visual quality.